高速微控制器用户指南:High-Speed Microcontroller User’s Guide
1. INTRODUCTION..9
2. ORDERING INFORMATION10
3. ARCHITECTURE..11
3.1 ALU11
3.2 SPECIAL FUNCTION REGISTERS (SFRS)..11
3.2.1 Accumulator . 11
3.2.2 B Register . 11
3.2.3 Program Status Word 11
3.2.4 Data Pointer(s) 11
3.2.5 Stack Pointer 11
3.2.6 I/O Ports . 11
3.2.7 Timer/Counters .. 12
3.2.8 UARTs. 12
3.2.9 Scratchpad Registers (RAM) 12
3.2.10 Stack 12
3.2.11 Working Registers. 12
3.2.12 Program Counter 12
3.2.13 Address/Data Bus . 12
3.2.14 Watchdog Timer. 12
3.2.15 Power Monitor . 12
3.2.16 Interrupts 13
3.2.17 Timing Control. 13
3.2.18 Real-Time Clock. 13
3.2.19 Feature Summary . 13
4. PROGRAMMING MODEL14
4.1 MEMORY ORGANIZATION14
4.1.1 Memory Map 14
4.1.2 Register Map 14
4.2 SPECIAL FUNCTION REGISTERS..17
4.2.1 Port 0 (P0). 25
4.2.2 Stack Pointer (SP). 25
4.2.3 Data Pointer Low 0 (DPL) .. 26
4.2.4 Data Pointer High 0 (DPH). 26
4.2.5 Data Pointer Low 1 (DPL1) 26
4.2.6 Data Pointer High 1 (DPH1).. 26
4.2.7 Data Pointer Select (DPS) . 27
4.2.8 Power Control (PCON). 27
4.2.9 Timer/Counter Control (TCON) 28
4.2.10 Timer Mode Control (TMOD) 29
4.2.11 Timer 0 LSB (TL0). 30
4.2.12 Timer 1 LSB (TL1). 30
4.2.13 Timer 0 MSB (TH0).. 30
4.2.14 Timer 1 MSB (TH1).. 30
4.2.15 Clock Control (CKCON) .. 31
4.2.16 Port 1 (P1). 32
4.2.17 External Interrupt Flag (EXIF) .. 33
4.2.18 RTC Trim Register (TRIM). 34
4.2.19 Serial Port 0 Control (SCON0). 35
4.2.20 Serial Data Buffer 0 (SBUF0) 36
4.2.21 Port 2 (P2). 36
4.2.22 Interrupt Enable (IE). 37
4.2.23 Slave Address Register 0 (SADDR0) .. 37
4.2.24 Slave Address Register 1 (SADDR1) .. 38
4.2.25 Port 3 (P3). 38